The present invention relates to a digital picture data processing unit suitable for recording digital picture data by compressingly encoding the data using a recording unit such as a VTR or the like, and for reproducing digital picture data which is a result of decoding the recorded data and expandingly processing this data.
A conventional method for recording and reproducing picture data by compressingly encoding digital picture data and by decoding and expandingly processing the data is described in the IEEE Transaction on Consumer Electronics, Vol. 35 (1989), No. 3, pp. 450-456. A general method for compressing picture data is to carry out as a serial processing each of data conversion, quantization and variable length encoding (this is also called an entropy encoding) for input picture data. According to this method, the degree of data compression can be changed by changing the condition for quantization. The above prior art example is also based on this method. Data conversion according to this prior art example is a DCT transformation (discrete cosine transformation) which is a kind of an orthogonal transformation for carrying out a two-dimensional DCT transformation of each block of data, one block including picture data of eight pixels (length) times eight pixels (width). A result of this data conversion is observed as picture data within a block on a frequency axis. Quantization is carried out for each frequency component by considering visual characteristics. A data quantity after a variable-length encoding is measured by a data quantity measuring unit, and quantization is carried out by selecting quantization conditions based on the result of measuring, so that the data quantity per one block after the variable-length encoding is restricted to below a predetermined size. An ID and an internal code parity are added to each block to form a synchronous block having a predetermined size. An external code parity is added to a group of a predetermined number of synchronous block to form one error correction code block. A series of synchronous blocks including two error correction parities are digitally modulated and are recorded on a magnetic tape. According to this method, error detections and corrections can be carried out by internal code parities and external code parities. Even if an error which can not be corrected has occurred, an error propagation range can be restricted to within one synchronous block.
According to the prior art technique, however, an encoding distortion is concentrated on blocks of high entropy (minimum quantity of information required for encoding) under a state where a high compression ratio is required because each block is restricted to have the same code length regardless of the size of entropy of each block. Therefore, an excess quantity of data is allocated to blocks of low entropy, resulting in an inefficiency. Accordingly, it is necessary to carry out encoding based on an encoding system which provides a variable length for data generated in each conversion block and which carries out an efficient distribution of data quantity among blocks within a field. An error correction code needs to be structured and recorded in such an encoding system as described above.
When the code length for each block is made variable, a starting point of each data conversion block within an error correction code block is not made consistent if variable-length codes are merely stored in series within the error correction code block and an error correction parity is added to this as has been done conventionally. Particularly, this becomes a problem in a high-speed reproduction mode where a picture must be restored by picking up only one portion on one track by crossing tracks on a tape in which picture data has been recorded to find a heading point of the picture. In order to obtain a picture having a content which can be understood, at least codes of a DC component and a low-frequency component need to be reproduced. However, no proposal has yet been made for effectively recording a code of low-frequency component including a DC component by considering a high-speed reproduction mode.